Calculator for Determining Current Capacity of PCB Traces

One approach to address the issue of track width and temperature rise is to convert the traces into large copper pours. This solution is particularly relevant for long tracks, where the rules for track width are designed to keep the temperature increase below a specific threshold, typically around 10 C.


Question:

I am currently working on a
PCB layout
project, which involves designing a basic buck converter that can convert 12V DC to 5V DC. The converter has a continuous output rating of 3A, with a peak output of 5A. To assist you, I have included links to the schematic and an initial version of the PCB layout. However, I must mention that the traces on the PCB layout are too thin and require modification.

http://uefi.io/buck-pcb.png

http://uefi.io/buck-schematic.png

My design considers the use of OSHPark for board manufacturing, utilizing 1oz thick copper layers. To handle the maximum 5A output, I require output current carrying traces that measure 109mill. Presently, these traces are only 9.84mills. As a result, I have several questions, primarily regarding
current capacity
.

Assuming a load of 5A, would the output of the buck converter on the switching outputs also be 5A or a fraction of it based on the duty cycle? It is unclear if this is oversimplified. The current load is distributed between three switching output pins in the chip used in my design, but their combined width is still less than half of 109 mill.

The current for the resistor branch can be easily calculated (1.2mA) without any concerns. Assuming a rating of 5A, what about the capacitor branches? Although there is no electric current flowing through them, they charge and discharge to smoothen the ripple, which requires displacement current. Should I consider this aspect?

I have come across various tools and calculators for trace width, but none for vias. Thus, I am unsure about the appropriate size for my vias. Can you please advise me on the recommended size?

The width of the 109mil trace for 5A is greater than the screw terminal pad. Should I enlarge the pads or follow a specific guideline for pad size in relation to the trace leading to it? Furthermore, what should be done about the connections from the other parallel branches, specifically the feedback resistors? Is it permissible to place a thinner trace on top of a thicker one?

Do you have any suggestions or comments regarding my PCB layout? Keep in mind that this is my first attempt at designing a PCB, so any feedback would be appreciated.

Please note that I did not have any specific application in mind while designing this PCB. The main objective of this exercise was to gain experience in PCB layout and KiCAD. As this is my first PCB layout, I plan to test its functionality with a dummy load before moving on to the next project. It is unlikely that this PCB will be enclosed in a case or developed into a finished product.

UPDATE: Revision 2

buck-pcb-revB

UPDATE: Revision 3

Although I have accepted an answer, I acknowledge that there may still be significant issues with this. For the sake of completeness, I am providing a “final” version, at least in terms of the kicad software. I might consider redoing it using Eagle or another program.

buck-pcb-revc1
buck-pcb-revc2


Solution:

Convert these tracks into sizeable copper planes.

To improve your circuit’s performance, it’s important to place the capacitor next to the inductor’s output. This placement will prevent any issues caused by the significant AC current that constantly flows from the inductor to the capacitor.

Keep in mind that the capacitor’s AC path must complete its circuit by returning to the IC’s ground and adjust it accordingly.

Opt for a compact switching node to eliminate noise. While C3 appears satisfactory, the subsequent components become rather convoluted.

To achieve efficient heat conduction into the ground plane, it is necessary to incorporate vias beneath the IC’s ground pad.

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